
r-virtual-0a:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400758 <_init>:
  400758:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  40075c:	910003fd 	mov	x29, sp
  400760:	9400003e 	bl	400858 <call_weak_fn>
  400764:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400768:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400770 <.plt>:
  400770:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400774:	b0000090 	adrp	x16, 411000 <__FRAME_END__+0x10178>
  400778:	f947fe11 	ldr	x17, [x16, #4088]
  40077c:	913fe210 	add	x16, x16, #0xff8
  400780:	d61f0220 	br	x17
  400784:	d503201f 	nop
  400788:	d503201f 	nop
  40078c:	d503201f 	nop

0000000000400790 <puts@plt>:
  400790:	d0000090 	adrp	x16, 412000 <puts@GLIBC_2.17>
  400794:	f9400211 	ldr	x17, [x16]
  400798:	91000210 	add	x16, x16, #0x0
  40079c:	d61f0220 	br	x17

00000000004007a0 <__libc_start_main@plt>:
  4007a0:	d0000090 	adrp	x16, 412000 <puts@GLIBC_2.17>
  4007a4:	f9400611 	ldr	x17, [x16, #8]
  4007a8:	91002210 	add	x16, x16, #0x8
  4007ac:	d61f0220 	br	x17

00000000004007b0 <__cxa_atexit@plt>:
  4007b0:	d0000090 	adrp	x16, 412000 <puts@GLIBC_2.17>
  4007b4:	f9400a11 	ldr	x17, [x16, #16]
  4007b8:	91004210 	add	x16, x16, #0x10
  4007bc:	d61f0220 	br	x17

00000000004007c0 <_ZNSt8ios_base4InitC1Ev@plt>:
  4007c0:	d0000090 	adrp	x16, 412000 <puts@GLIBC_2.17>
  4007c4:	f9400e11 	ldr	x17, [x16, #24]
  4007c8:	91006210 	add	x16, x16, #0x18
  4007cc:	d61f0220 	br	x17

00000000004007d0 <abort@plt>:
  4007d0:	d0000090 	adrp	x16, 412000 <puts@GLIBC_2.17>
  4007d4:	f9401211 	ldr	x17, [x16, #32]
  4007d8:	91008210 	add	x16, x16, #0x20
  4007dc:	d61f0220 	br	x17

00000000004007e0 <__gmon_start__@plt>:
  4007e0:	d0000090 	adrp	x16, 412000 <puts@GLIBC_2.17>
  4007e4:	f9401611 	ldr	x17, [x16, #40]
  4007e8:	9100a210 	add	x16, x16, #0x28
  4007ec:	d61f0220 	br	x17

00000000004007f0 <printf@plt>:
  4007f0:	d0000090 	adrp	x16, 412000 <puts@GLIBC_2.17>
  4007f4:	f9401a11 	ldr	x17, [x16, #48]
  4007f8:	9100c210 	add	x16, x16, #0x30
  4007fc:	d61f0220 	br	x17

0000000000400800 <_ZNSt8ios_base4InitD1Ev@plt>:
  400800:	d0000090 	adrp	x16, 412000 <puts@GLIBC_2.17>
  400804:	f9401e11 	ldr	x17, [x16, #56]
  400808:	9100e210 	add	x16, x16, #0x38
  40080c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400810 <_start>:
  400810:	d280001d 	mov	x29, #0x0                   	// #0
  400814:	d280001e 	mov	x30, #0x0                   	// #0
  400818:	aa0003e5 	mov	x5, x0
  40081c:	f94003e1 	ldr	x1, [sp]
  400820:	910023e2 	add	x2, sp, #0x8
  400824:	910003e6 	mov	x6, sp
  400828:	580000c0 	ldr	x0, 400840 <_start+0x30>
  40082c:	580000e3 	ldr	x3, 400848 <_start+0x38>
  400830:	58000104 	ldr	x4, 400850 <_start+0x40>
  400834:	97ffffdb 	bl	4007a0 <__libc_start_main@plt>
  400838:	97ffffe6 	bl	4007d0 <abort@plt>
  40083c:	00000000 	.inst	0x00000000 ; undefined
  400840:	0040090c 	.word	0x0040090c
  400844:	00000000 	.word	0x00000000
  400848:	00400ae8 	.word	0x00400ae8
  40084c:	00000000 	.word	0x00000000
  400850:	00400b68 	.word	0x00400b68
  400854:	00000000 	.word	0x00000000

0000000000400858 <call_weak_fn>:
  400858:	b0000080 	adrp	x0, 411000 <__FRAME_END__+0x10178>
  40085c:	f947f000 	ldr	x0, [x0, #4064]
  400860:	b4000040 	cbz	x0, 400868 <call_weak_fn+0x10>
  400864:	17ffffdf 	b	4007e0 <__gmon_start__@plt>
  400868:	d65f03c0 	ret
  40086c:	00000000 	.inst	0x00000000 ; undefined

0000000000400870 <deregister_tm_clones>:
  400870:	d0000080 	adrp	x0, 412000 <puts@GLIBC_2.17>
  400874:	91014000 	add	x0, x0, #0x50
  400878:	d0000081 	adrp	x1, 412000 <puts@GLIBC_2.17>
  40087c:	91014021 	add	x1, x1, #0x50
  400880:	eb00003f 	cmp	x1, x0
  400884:	540000a0 	b.eq	400898 <deregister_tm_clones+0x28>  // b.none
  400888:	90000001 	adrp	x1, 400000 <_init-0x758>
  40088c:	f945c421 	ldr	x1, [x1, #2952]
  400890:	b4000041 	cbz	x1, 400898 <deregister_tm_clones+0x28>
  400894:	d61f0020 	br	x1
  400898:	d65f03c0 	ret
  40089c:	d503201f 	nop

00000000004008a0 <register_tm_clones>:
  4008a0:	d0000080 	adrp	x0, 412000 <puts@GLIBC_2.17>
  4008a4:	91014000 	add	x0, x0, #0x50
  4008a8:	d0000081 	adrp	x1, 412000 <puts@GLIBC_2.17>
  4008ac:	91014021 	add	x1, x1, #0x50
  4008b0:	cb000021 	sub	x1, x1, x0
  4008b4:	9343fc21 	asr	x1, x1, #3
  4008b8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4008bc:	9341fc21 	asr	x1, x1, #1
  4008c0:	b40000a1 	cbz	x1, 4008d4 <register_tm_clones+0x34>
  4008c4:	90000002 	adrp	x2, 400000 <_init-0x758>
  4008c8:	f945c842 	ldr	x2, [x2, #2960]
  4008cc:	b4000042 	cbz	x2, 4008d4 <register_tm_clones+0x34>
  4008d0:	d61f0040 	br	x2
  4008d4:	d65f03c0 	ret

00000000004008d8 <__do_global_dtors_aux>:
  4008d8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4008dc:	910003fd 	mov	x29, sp
  4008e0:	f9000bf3 	str	x19, [sp, #16]
  4008e4:	d0000093 	adrp	x19, 412000 <puts@GLIBC_2.17>
  4008e8:	39414260 	ldrb	w0, [x19, #80]
  4008ec:	35000080 	cbnz	w0, 4008fc <__do_global_dtors_aux+0x24>
  4008f0:	97ffffe0 	bl	400870 <deregister_tm_clones>
  4008f4:	52800020 	mov	w0, #0x1                   	// #1
  4008f8:	39014260 	strb	w0, [x19, #80]
  4008fc:	f9400bf3 	ldr	x19, [sp, #16]
  400900:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400904:	d65f03c0 	ret

0000000000400908 <frame_dummy>:
  400908:	17ffffe6 	b	4008a0 <register_tm_clones>

000000000040090c <main>:
  40090c:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400910:	910003fd 	mov	x29, sp
  400914:	b9001fa0 	str	w0, [x29, #28]
  400918:	f9000ba1 	str	x1, [x29, #16]
  40091c:	90000000 	adrp	x0, 400000 <_init-0x758>
  400920:	91322000 	add	x0, x0, #0xc88
  400924:	f90013a0 	str	x0, [x29, #32]
  400928:	90000000 	adrp	x0, 400000 <_init-0x758>
  40092c:	91300000 	add	x0, x0, #0xc00
  400930:	d2800101 	mov	x1, #0x8                   	// #8
  400934:	97ffffaf 	bl	4007f0 <printf@plt>
  400938:	910083a1 	add	x1, x29, #0x20
  40093c:	90000000 	adrp	x0, 400000 <_init-0x758>
  400940:	91304000 	add	x0, x0, #0xc10
  400944:	97ffffab 	bl	4007f0 <printf@plt>
  400948:	910083a0 	add	x0, x29, #0x20
  40094c:	f9400001 	ldr	x1, [x0]
  400950:	90000000 	adrp	x0, 400000 <_init-0x758>
  400954:	9130a000 	add	x0, x0, #0xc28
  400958:	97ffffa6 	bl	4007f0 <printf@plt>
  40095c:	910083a0 	add	x0, x29, #0x20
  400960:	f9400000 	ldr	x0, [x0]
  400964:	aa0003e1 	mov	x1, x0
  400968:	90000000 	adrp	x0, 400000 <_init-0x758>
  40096c:	91314000 	add	x0, x0, #0xc50
  400970:	97ffffa0 	bl	4007f0 <printf@plt>
  400974:	b9003fbf 	str	wzr, [x29, #60]
  400978:	b9403fa0 	ldr	w0, [x29, #60]
  40097c:	7100141f 	cmp	w0, #0x5
  400980:	5400028c 	b.gt	4009d0 <main+0xc4>
  400984:	b9803fa0 	ldrsw	x0, [x29, #60]
  400988:	d37df000 	lsl	x0, x0, #3
  40098c:	910083a1 	add	x1, x29, #0x20
  400990:	f9400021 	ldr	x1, [x1]
  400994:	8b010000 	add	x0, x0, x1
  400998:	f9400000 	ldr	x0, [x0]
  40099c:	f9001ba0 	str	x0, [x29, #48]
  4009a0:	f9401ba0 	ldr	x0, [x29, #48]
  4009a4:	f100001f 	cmp	x0, #0x0
  4009a8:	54000120 	b.eq	4009cc <main+0xc0>  // b.none
  4009ac:	f9401ba0 	ldr	x0, [x29, #48]
  4009b0:	f90017a0 	str	x0, [x29, #40]
  4009b4:	f94017a0 	ldr	x0, [x29, #40]
  4009b8:	d63f0000 	blr	x0
  4009bc:	b9403fa0 	ldr	w0, [x29, #60]
  4009c0:	11000400 	add	w0, w0, #0x1
  4009c4:	b9003fa0 	str	w0, [x29, #60]
  4009c8:	17ffffec 	b	400978 <main+0x6c>
  4009cc:	d503201f 	nop
  4009d0:	52800000 	mov	w0, #0x0                   	// #0
  4009d4:	a8c47bfd 	ldp	x29, x30, [sp], #64
  4009d8:	d65f03c0 	ret

00000000004009dc <_Z41__static_initialization_and_destruction_0ii>:
  4009dc:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4009e0:	910003fd 	mov	x29, sp
  4009e4:	b9001fa0 	str	w0, [x29, #28]
  4009e8:	b9001ba1 	str	w1, [x29, #24]
  4009ec:	b9401fa0 	ldr	w0, [x29, #28]
  4009f0:	7100041f 	cmp	w0, #0x1
  4009f4:	540001e1 	b.ne	400a30 <_Z41__static_initialization_and_destruction_0ii+0x54>  // b.any
  4009f8:	b9401ba1 	ldr	w1, [x29, #24]
  4009fc:	529fffe0 	mov	w0, #0xffff                	// #65535
  400a00:	6b00003f 	cmp	w1, w0
  400a04:	54000161 	b.ne	400a30 <_Z41__static_initialization_and_destruction_0ii+0x54>  // b.any
  400a08:	d0000080 	adrp	x0, 412000 <puts@GLIBC_2.17>
  400a0c:	91016000 	add	x0, x0, #0x58
  400a10:	97ffff6c 	bl	4007c0 <_ZNSt8ios_base4InitC1Ev@plt>
  400a14:	d0000080 	adrp	x0, 412000 <puts@GLIBC_2.17>
  400a18:	91012002 	add	x2, x0, #0x48
  400a1c:	d0000080 	adrp	x0, 412000 <puts@GLIBC_2.17>
  400a20:	91016001 	add	x1, x0, #0x58
  400a24:	90000000 	adrp	x0, 400000 <_init-0x758>
  400a28:	91200000 	add	x0, x0, #0x800
  400a2c:	97ffff61 	bl	4007b0 <__cxa_atexit@plt>
  400a30:	d503201f 	nop
  400a34:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400a38:	d65f03c0 	ret

0000000000400a3c <_GLOBAL__sub_I_main>:
  400a3c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400a40:	910003fd 	mov	x29, sp
  400a44:	529fffe1 	mov	w1, #0xffff                	// #65535
  400a48:	52800020 	mov	w0, #0x1                   	// #1
  400a4c:	97ffffe4 	bl	4009dc <_Z41__static_initialization_and_destruction_0ii>
  400a50:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400a54:	d65f03c0 	ret

0000000000400a58 <_ZN5Base110function_2Ev>:
  400a58:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400a5c:	910003fd 	mov	x29, sp
  400a60:	f9000fa0 	str	x0, [x29, #24]
  400a64:	90000000 	adrp	x0, 400000 <_init-0x758>
  400a68:	912e8000 	add	x0, x0, #0xba0
  400a6c:	97ffff49 	bl	400790 <puts@plt>
  400a70:	d503201f 	nop
  400a74:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400a78:	d65f03c0 	ret

0000000000400a7c <_ZN5Base210function_1Ev>:
  400a7c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400a80:	910003fd 	mov	x29, sp
  400a84:	f9000fa0 	str	x0, [x29, #24]
  400a88:	90000000 	adrp	x0, 400000 <_init-0x758>
  400a8c:	912ee000 	add	x0, x0, #0xbb8
  400a90:	97ffff40 	bl	400790 <puts@plt>
  400a94:	d503201f 	nop
  400a98:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400a9c:	d65f03c0 	ret

0000000000400aa0 <_ZN5Base210function_3Ev>:
  400aa0:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400aa4:	910003fd 	mov	x29, sp
  400aa8:	f9000fa0 	str	x0, [x29, #24]
  400aac:	90000000 	adrp	x0, 400000 <_init-0x758>
  400ab0:	912f4000 	add	x0, x0, #0xbd0
  400ab4:	97ffff37 	bl	400790 <puts@plt>
  400ab8:	d503201f 	nop
  400abc:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400ac0:	d65f03c0 	ret

0000000000400ac4 <_ZN3Sub10function_5Ev>:
  400ac4:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400ac8:	910003fd 	mov	x29, sp
  400acc:	f9000fa0 	str	x0, [x29, #24]
  400ad0:	90000000 	adrp	x0, 400000 <_init-0x758>
  400ad4:	912fa000 	add	x0, x0, #0xbe8
  400ad8:	97ffff2e 	bl	400790 <puts@plt>
  400adc:	d503201f 	nop
  400ae0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400ae4:	d65f03c0 	ret

0000000000400ae8 <__libc_csu_init>:
  400ae8:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400aec:	910003fd 	mov	x29, sp
  400af0:	a901d7f4 	stp	x20, x21, [sp, #24]
  400af4:	b0000094 	adrp	x20, 411000 <__FRAME_END__+0x10178>
  400af8:	b0000095 	adrp	x21, 411000 <__FRAME_END__+0x10178>
  400afc:	9132a294 	add	x20, x20, #0xca8
  400b00:	913262b5 	add	x21, x21, #0xc98
  400b04:	a902dff6 	stp	x22, x23, [sp, #40]
  400b08:	cb150294 	sub	x20, x20, x21
  400b0c:	f9001ff8 	str	x24, [sp, #56]
  400b10:	2a0003f6 	mov	w22, w0
  400b14:	aa0103f7 	mov	x23, x1
  400b18:	9343fe94 	asr	x20, x20, #3
  400b1c:	aa0203f8 	mov	x24, x2
  400b20:	97ffff0e 	bl	400758 <_init>
  400b24:	b4000194 	cbz	x20, 400b54 <__libc_csu_init+0x6c>
  400b28:	f9000bb3 	str	x19, [x29, #16]
  400b2c:	d2800013 	mov	x19, #0x0                   	// #0
  400b30:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400b34:	aa1803e2 	mov	x2, x24
  400b38:	aa1703e1 	mov	x1, x23
  400b3c:	2a1603e0 	mov	w0, w22
  400b40:	91000673 	add	x19, x19, #0x1
  400b44:	d63f0060 	blr	x3
  400b48:	eb13029f 	cmp	x20, x19
  400b4c:	54ffff21 	b.ne	400b30 <__libc_csu_init+0x48>  // b.any
  400b50:	f9400bb3 	ldr	x19, [x29, #16]
  400b54:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400b58:	a942dff6 	ldp	x22, x23, [sp, #40]
  400b5c:	f9401ff8 	ldr	x24, [sp, #56]
  400b60:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400b64:	d65f03c0 	ret

0000000000400b68 <__libc_csu_fini>:
  400b68:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400b6c <_fini>:
  400b6c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400b70:	910003fd 	mov	x29, sp
  400b74:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400b78:	d65f03c0 	ret
